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Semiconductor
E RN D FO ARH DE MEN -1840 COM See HS RE NOT
September 1997
ES WD
IGN
S
HS-1840RH
Rad-Hard 16 Channel CMOS Analog Multiplexer with High-Z Analog Input Protection
Description
The HS-1840RH is a radiation hardened, monolithic 16 channel multiplexer constructed with the Harris Linear Dielectric Isolation CMOS process. It is designed to provide a high input impedance to the analog source if device power fails (open) or the analog signal voltage inadvertently exceeds the supply rails during powered operation. Excellent for use in redundant applications, since the secondary device can be operated in a standby unpowered mode affording no additional power drain. More significantly, a very high impedance exists between the active and inactive devices preventing any interaction. One of sixteen channel selection is controlled by a 4-bit binary address plus an Enable-Inhibit input which conveniently controls the ON/OFF operation of several multiplexers in a system. All digital inputs have electrostatic discharge protection.
PKG. NO.
Features
* Radiation Environment - Gamma Rate () 1 x 108 RAD(Si)/s tle (HS-1840RH) - Gamma Dose () 2 x 105 RAD(Si) ject (Rad-Hard 16 Power Consumption Channel CMOS Analog * Low tiplexer with* High-Z Analog Input Protection) Fast Access Time 1000ns hor () * High Analog Input Impedance 500M During Power Loss (Open) words () * Dielectrically Isolated Device Islands ator () * Excellent In Hi-Rel Redundant Systems CINFO pdfmark * Break-Before-Make Switching * No Latch-Up geMode /UseOutlines
Ordering Information CVIEW pdfmark
PART NUMBER HS1-1840RH-Q HS1-1840RH-8 HS1-1840RH/Proto HS1-1840RH/Sample HS9-1840RH-Q HS9-1840RH-8 HS9-1840RH/Proto HS9-1840RH/Sample TEMP. RANGE (oC) -55 to 125 -55 to 125 -55 to 125 25 -55 to 125 -55 to 125 -55 to 125 25 PACKAGE 28 Ld CERDIP 28 Ld CERDIP 28 Ld CERDIP 28 Ld CERDIP 28 Ld FP 28 Ld FP 28 Ld FP 28 Ld FP
The HS-1840RH has been specifically designed to meet exposure to radiation environments. It is available in a 28 lead Ceramic Sidebraze dual-in-line package and 28 lead Ceramic Flatpack. It is guaranteed operational from -55oC to +125oC.
Pinouts
HS1-1840RH 28 LEAD SIDEBRAZE CERDIP CASE OUTLINE GDIP1-T28, COMPLIANT TO MIL-STD1835 PACKAGE TOP VIEW
+VS 1 NC 2 NC 3 IN 16 4 IN 15 5 IN 14 6 IN 13 7 IN 12 8 IN 11 9 IN 10 10 IN 9 11 GND 12 (+5VS) VREF 13 ADDR A3 14 28 OUT 27 -VS 26 IN 8 25 IN 7 24 IN 6 23 IN 5 22 IN 4 21 IN 3 20 IN 2 19 IN 1 18 ENABLE 17 ADDR A0 16 ADDR A1 15 ADDR A2
HS9-1840RH 28 LEAD CERAMIC SIDEBRAZE CASE FLATPACK OUTLINE CDFP3-F28, COMPLIANT TO MIL-STD-1835 PACKAGE TOP VIEW
+VS NC NC IN 16 IN 15 IN 14 IN 13 IN 12 IN 11 IN 10 IN 9 GND (+5VS) VREF ADDR A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 OUT -VS IN 8 IN 7 IN 6 IN 5 IN 4 IN 3 IN 2 IN 1 ENABLE ADDR A0 ADDR A1 ADDR A2
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright
(c) Harris Corporation 1997
File Number Spec Number
1
3992.1 518022
HS-1840RH Functional Diagram
A0 1 P IN 1
A1 DIGITAL ADDRESS A2 OUT
A3
1 EN
P IN 16
ADDRESS INPUT BUFFER AND LEVEL SHIFTER
DECODERS
MULTIPLEX SWITCHES
Truth Table
A3 X L L L L L L L L H H H H H H H H A2 X L L L L H H H H L L L L H H H H A1 X L L H H L L H H L L H H L L H H A0 X L H L H L H L H L H L H L H L H EN H L L L L L L L L L L L L L L L L "ON" CHANNEL None 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Spec Number 2
518022
Specifications HS-1840RH
Absolute Maximum Ratings
Supply Voltage Between Pins 1 and 27 . . . . . . . . . . . . . . . . . . +40V +VSUPPLY to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20V -VSUPPLY to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-20V VREF to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20V Analog Input Overvoltage +VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +25V (Power On/Off) -VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V (Power On/Off) Digital Input Overvoltage +VEN, +VA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VREF +4V -VEN, -VA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND -4V Continuous Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA Storage Temperature Range . . . . . . . . . . . . . . . . . -65oC to +150oC Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +275oC
Reliability Information
Thermal Resistance . . . . . . . . . . . . . . . . . . JA JC Sidebraze Package . . . . . . . . . . . . . . . . . 83.1oC/W 19.1oC/W Flatpack Package . . . . . . . . . . . . . . . . . . 49.1oC/W 16.5oC/W Total Power Dissipation (Note) Sidebraze CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . 1600mW Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . 1400mW ESD Classification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 NOTE: For DIP Derate 20.4mW/oC above TA = +95oC For Flatpack Derate 18.5mW/oC above TA = +95oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Supply Voltage (VSUPPLY) . . . . . . . . . . . . . . . . . . . . 15V Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC VREF (Pin 13) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V Logic Low Level (VAL). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.8V Logic High Level (VAH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.0V
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS Device Guaranteed and 100% Tested. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V GROUP A SUBGROUPS 7, 8A, 8B Measure Inputs Sequentially Ground All Unused Pins VS = +10V, All Unused Inputs and Output = -10V, VEN = 4V VS = -10V, All Unused Inputs, Output = +10V, VEN = 4V V+, V-, VREF, A0, A1, A2, A3,A4, EN = GND, Unused Inputs Tied to GND, VS = +25V VS = +25V, VD = 0V, VEN = 4V All Unused Inputs Tied to GND VS = -25V, VD = 0V, VEN = 4V All Unused Inputs Tied to GND VD = +10V, VEN = 4V All Unused Inputs = -10V VD = -10V, VEN = 4V All Unused Inputs = +10V VS = +25V, Measure VD, VEN = 4V, All Unused Inputs to GND VS = -25V, Measure VD, All Unused Inputs to GND 1, 2, 3 LIMITS TEMPERATURE -55oC, +25oC, +125oC Input Leakage Current, Address, or Enable Pins Leakage Current Into the Source Terminal of an "Off" Switch IAH IAL +IS(OFF) -55oC, +25oC, +125oC +25oC +125oC,-55oC +25oC +125oC, -55oC -1000 1000 nA MIN -5 MAX +15 UNITS V
PARAMETER Analog Signal Range
SYMBOL VS
CONDITIONS
1 2, 3 1 2, 3 1 2, 3
-10 -100 -10 -100 -50 -100
10 100 10 100 50 100
nA nA nA nA nA nA
-IS(OFF)
Leakage Current into the Source Terminal of an "Off" Switch With Power "Off" Leakage Current Into the Source Terminal of an "Off" Switch With Overvoltage Applied Leakage Current Into the Drain Terminal of an "Off" Switch
+IS(OFF) Power Off
+25oC +125oC, -55oC
+IS(OFF) Overvoltage -IS(OFF) Overvoltage +ID(OFF)
1, 2, 3 1, 2, 3 1 2, 3 1 2, 3 1, 2, 3
-55oC, +25oC, +125oC -55oC, +25oC, +125oC +25oC +125oC, -55oC
-1000 -1000 -10 -100 -10 -100 -1000
1000 1000 10 100 10 100 1000
nA nA nA nA nA nA nA
-ID(OFF)
+25oC +125oC, -55oC, -55oC
Leakage Current Into the Drain Terminal of an "Off" Switch With Overvoltage Applied
+ID(OFF) Overvoltage -ID(OFF) Overvoltage
+25oC,
+125oC 1, 2, 3 -55oC, +25oC, +125oC -1000 1000 nA
Spec Number 3
518022
Specifications HS-1840RH
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Guaranteed and 100% Tested. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V GROUP A SUBGROUPS 1 2, 3 1 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 LIMITS TEMPERATURE +25oC +125oC, -55oC MIN -10 -100 -10 -100 50 50 50 -0.5 -0.5 MAX 10 100 10 100 1000 4000 2500 0.5 0.5 UNITS nA nA nA nA mA mA mA mA
PARAMETER Leakage Current from an "On" Driver into the Switch (Drain & Source)
SYMBOL +ID(ON)
CONDITIONS VS = +10V, VD = +10V, VEN = 0.8V All Unused Inputs = -10V VS = -10V, VD = -10V, VEN = 0.8V, All Unused Inputs = +10V VS = +15V, ID = -1mA, VEN = 0.8V VS = -5V, ID = +1mA, VEN = 0.8V VS = +5V, ID = -1mA, VEN = 0.8V VEN = 0.8V VEN = 0.8V VEN = 4.0V VEN = 4.0V
-ID(ON)
+25oC +125oC, -55oC, -55oC
Switch On Resistance
+15V R(ON) -5V R(ON) +5V R(ON)
+25oC,
+125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC
Positive Supply Current Negative Supply Current Positive Standby Supply Current Negative Standby Supply Current
I(+) I(-) +ISBY -ISBY
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS Device Guaranteed and 100% Tested. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V GROUP A SUBGROUPS 9 10, 11 TON(A), TOFF(A) TON(EN), TOFF(EN) RL = 10k, CL = 50pF 9 10, 11 RL = 1000, CL = 50pF 9 10, 11 LIMITS TEMPERATURE +25oC +125oC, -55oC MIN 25 5 MAX 600 1000 600 1000 UNITS ns ns ns ns ns ns
PARAMETER Break-Before-Make Time Delay Propagation Delay Times: Address Inputs to I/O Channels Enable to I/O
SYMBOL TD
CONDITIONS RL = 1000, CL = 50pF
+25oC +125oC, -55oC
+25oC +125oC, -55oC
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS Device Characterized At: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V, Unless Otherwise Specified LIMITS PARAMETER Capacitance Address Input Capacitance Channel Input Capacitance Channel Output Off Isolation SYMBOL CA CS(OFF) CD(OFF) TOFF(EN) VISO CONDITIONS +VS = -VS = 0V, f = 1MHz +VS = -VS = 0V, f = 1MHz +VS = -VS = 0V, f = 1MHz VEN = 4.0V, f = 200kHz, CL = 7pF, RL = 1k, VS = 3.0VRMS NOTE 1 1 1 1 TEMPERATURE +25oC +25oC +25oC +25oC MIN 45 MAX 7 5 50 UNITS pF pF pF dB
NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters and not directly tested. These parameters are characterized upon initial design and after major process and/or design changes.
Spec Number 4
518022
Specifications HS-1840RH
TABLE 4. POST 200K RAD(Si) ELECTRICAL CHARACTERISTICS Tested, per MIL-STD-883. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.5V, VAL = 0.5V GROUP A SUBGROUPS 1 1 1 1 LIMITS TEMPERATURE +25oC +25oC +25oC +25oC MIN -1000 -100 -100 -100 MAX 1000 100 100 100 UNITS nA nA nA nA
PARAMETER Input Leakage Current, Address, or Enable Pins Leakage Current Into the Source Terminal of an "Off" Switch
SYMBOL IAH IAL +IS(OFF) -IS(OFF) +IS(OFF) Power Off
CONDITIONS Measure Inputs Sequentially, Ground All Unused Pins VS = +10V, All Unused Inputs and Output = -10V, VEN = 4.5V VS = -10V, All Unused Inputs and Output = +10V, VEN = 4.5V V+, V-, VREF, A0, A1, A2, A3, A4, EN = GND, Unused Inputs Tied to GND, VS = +25V VS = +25V, VD = 0V, VEN = 4.5V All Unused Inputs Tied to GND VS = -25V, VD = 0V, VEN = 4.5V All Unused Inputs Tied to GND VD = +10V, VEN = 4.5V All Unused Inputs = -10V VD = -10V, VEN = 4.5V All Unused Inputs = +10V VS = +25V, Measure VD, VEN = 4.5V All Unused Inputs to GND VS = -25V, Measure VD, VEN = 4.5V All Unused Inputs to GND VS = +10V, VD = +10V, VEN = 0.5V All Unused Inputs = -10V VS = -10V, VD = -10V, VEN = 0.5V All Unused Inputs = +10V VS = +15V, ID = -1mA, VEN = 0.5V VS = -5V, ID = +1mA, VEN = 0.5V VS = +5V, ID = -1mA, VEN = 0.5V VEN = 0.5V VEN = 0.5V VEN = 4.5V VEN = 4.5V RL = 1000, CL = 50pf RL = 10K, CL = 50pf
Leakage Current into the Source Terminal of an "Off" Switch With Power "Off" Leakage Current Into the Source Terminal of an "Off" Switch With Overvoltage Applied Leakage Current Into the Drain Terminal of an "Off" Switch
+IS(OFF) Overvoltage -IS(OFF) Overvoltage +ID(OFF) -ID(OFF) +ID(OFF) Overvoltage -ID(OFF) Overvoltage +ID(ON)
1 1 1 1 1
+25oC +25oC +25oC +25oC +25oC
-1500 -1500 -100 -100 -1000
1500 1500 100 100 1000
nA nA nA nA nA
Leakage Current Into the Drain Terminal of an "Off" Switch With Overvoltage Applied
1
+25oC
-1000
1000
nA
Leakage Current from an "On" Driver into the Switch (Drain & Source)
1
+25oC
-100
100
nA
-ID(ON)
1
+25oC
-100
100
nA
Switch On Resistance
+15V R(ON) -5V R(ON) +5V R(ON)
1 1 1 1 1 1 1 9 9
+25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC
50 50 50 -0.50 -0.50 5 -
1000 4000 2500 0.50 0.50 3000
mA mA mA mA ns ns
Positive Supply Current Negative Supply Current Positive Standby Supply Current Negative Standby Supply Current Make-Before-Break Time Delay Propagation Delay Times: Address Inputs to I/O Channels Enable to I/O
I(+) I(-) +I(SBY) -I(SBY) TD TON (A) TOFF (A) TON (EN) TOFF (EN)
RL = 1000, CL = 50pf
9
+25oC
-
3000
ns
Spec Number 5
518022
Specifications HS-1840RH
TABLE 5. DC POST BURN-IN DELTA ELECTRICAL CHARACTERISTICS Guaranteed, per MIL-STD-883, Method 1019. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V GROUP A SUBGROUPS 1 LIMITS TEMPERATURE +25oC MIN -100 MAX 100 UNITS nA
PARAMETER Input Leakage Current, Address, or Enable Pins Leakage Current Into the Source Terminal of an "Off" Switch
SYMBOL IAH IAL +IS(OFF) -IS(OFF) +ID(OFF) -ID(OFF) + ID(ON)
CONDITIONS Measure Inputs Sequentially, Ground All Unused Pins VS = +10V, All Unused Inputs & Output = -10V, VEN = 4.0V VS = -10V, All Unused Inputs & Output = +10V, VEN = 4.0V VD = +10V, VEN = 4.0V All Unused Inputs = -10V VD = -10V, VEN = 4.0V All Unused Inputs = +10V VS = +10V, VD = +10V, VEN = 0.8V All Unused Inputs = -10V VS = -10V, VD = -10V, VEN = 0.8V All Unused Inputs = +10V VS = +15V, ID = -1mA, VEN = 0.8V VS = -5V, ID = +1mA, VEN = 0.8V VEN = 0.8V VEN = 0.8V VEN = 4.0V VEN = 4.0V
1 1 1 1 1
+25oC +25oC +25oC +25oC +25oC
-20 -20 -20 -20 -20
20 20 20 20 20
nA nA nA nA nA
Leakage Current Into the Drain Terminal of an "Off" Switch
Leakage Current from an "On" Driver into the Switch (Drain & Source)
-ID(ON)
1
+25oC
-20
20
nA
Switch On Resistance
+15V R(ON) -5V R(ON)
1 1 1 1 1 1
+25oC +25oC +25oC +25oC +25oC +25oC
-150 -250 -50 -50 -50 -50
150 250 50 50 50 50
A A A A
Positive Supply Current Negative Supply Current Positive Standby Supply Current Negative Standby Supply Current
I(+) I(-) +ISBY -ISBY
TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUPS Initial Test Interim Test PDA Final Test Group A Group B B5 Others Group C Group D Group E, Subgroup 2 METHOD 100%/5004 100%/5004 100%/5004 100%/5004 Samples/5005 Samples/5005 Samples/5005 Samples/5005 Samples/5005 Samples/5005 -Q SUBGROUPS 1 1 1 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3 1, 7 N/A 1, 7 1, 7 -8 SUBGROUPS 1 N/A 1 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 N/A N/A 1, 2, 3 1, 7 1, 7
Spec Number 6
518022
HS-1840RH Performance Characteristics and Test Circuits
ACCESS TIME vs LOGIC LEVEL (HIGH)
4.0V 50% VA 0.8V VA 50
A3 A2 A1 A0 0.8V EN GND
IN 1 IN 2 IN 15 IN 16
15V, 0V
0V, 15V VOUT
VOUT 50% 0V tA
10K
50pF
BREAK-BEFORE-MAKE DELAY (tOPEN)
4.0V VA 50
A3 A2 A1 A0 EN
VA VOUT 50% 50%
0.8V
IN 1 IN 2 IN 15 IN 16 GND OUT 1K
+5V
0.8V
VOUT 50pF
tOPEN
ENABLE DELAY (tON(EN), tOFF(EN))
VA 4.0V A3 0.8V A2 A1 A0 90% OUTPUT VA 50 EN 1K VOUT 50pF IN 2 IN 16 IN 1 +10V
VOUT tON(EN)
10%
tOFF(EN)
Spec Number 7
518022
HS-1840RH Burn-In/Life Test Circuits
R +VS R 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 R -VS +VS R 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 R -VS R
F5 F1 F2 F3
GND F4
GND VR R
DYNAMIC BURN-IN AND LIFE TEST CIRCUIT NOTES: VS+ = +15.5V 0.5V, VS- = -15.5V 0.5V R = 1k 5% C1 = C2 = 0.01F 10%, 1 each per socket, minimum D1 = D2 = 1N4002, 1 each per board, minimum Input Signals: square wave, 50% duty cycle, 0V to 15V peak 10% F1 = 100kHz; F2 = F1/2; F3 = F1/4; F4 = F1/8; F5 = F1/16 NOTES: 1. The above test circuits are utilized for all package types. 2. The Dynamic Test Circuit is utilized for all life testing. NOTES:
STATIC BURN-IN TEST CIRCUIT R = 1k 5%, 1/4W C1 = C2 = 0.01F minimum, 1 each per socket, minimum VS+ = 15.5V 0.5V, VS- = -15.5V 0.5V, VR = 15.5 0.5V
Irradiation Circuit
HS-1840RH 28 LEAD DIP
+15V NC NC +1V
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15 -15V 1K
+5V
NOTE: All irradiation testing is performed in the 28 lead CerDIP package.
Spec Number 8
518022
HS-1840RH Schematic Diagrams
ADDRESS INPUT BUFFER AND LEVEL SHIFTER
V REF
LEVEL SHIFTER V+ P P P P P P P P P LEVEL SHIFTED ADDRESS TO DECODE LEVEL SHIFTED ADDRESS TO DECODE
OVERVOLTAGE PROTECTION V REF D2 R1 200 D1
P
N
R2 R5 R3 R4 R6 R8 N N N N N N N R7
ADD IN.
N
N
V-
ADDRESS DECODER
+V P P P P P
MULTIPLEX SWITCH
V+
N A0 OR A0 A1 OR A1 A2 OR A2 A3 OR A3 N
TO SWITCH P P P S IN
N
FROM DECODE D
N N N N
OUT
ENABLE VV-
Spec Number 9
518022
HS-1840RH Harris - Space Level Product Flow
SEM - Traceable to Diffusion Method 2018, Modified This device does not meet MIL-STD-883 Method 2018.3 Class S minimum metal step coverage of 50%. The metal does meet the intent of the Class S requirement by meeting the current density requirement of <2E5 A/cm2. Calculation based on continuous current of 10mA. Data can be provided upon request. Wafer Lot Acceptance Method 5007 Internal Visual Inspection (Note 1) Gamma Radiation Assurance Tests Method 1019 100% Nondestructive Bond Pull Method 2023 Customer Pre-Cap Visual Inspection (Notes 1, 2) Temperature Cycling Method 1010 Condition C Constant Acceleration Method 2001 Y1 30KG Particle Impact Noise Detection Method 2020, Condition A 20G Marking and Serialization X-Ray Inspection Method 2012 Initial Electrical Tests (T0) Static Burn-In 72 Hour, +125oC (Min) Method 1015 Condition A
NOTES: 1. Visual Inspection is performed to MIL-STD-883 Method 2010, Condition A. 2. These steps are optional, and should be listed on the purchase order if required. 3. Data package contains: Assembly Attributes (post seal) Test Attributes (includes Group A) -55oC, +25oC, +125oC Shippable Serial Number List Radiation Testing Certificate of Conformance Wafer Lot Acceptance Report (includes SEM report) X-Ray Report and Film Test Variables Data, (Table 5 Parameters only) +25oC Initial Test +25oC Interim Test 1 +25oC Interim Test 2 +25oC Delta Over Burn-In 4. Group B data package contains Attributes Data and Variables Data, (Table 5 Parameters only). Group D data package contains Attributes only.
Room Temperature Electrical Tests (T1) Burn-In Delta Calculation (T0-T1) PDA Calculation 3% Functional 5% Subgroups 1, 7, Dynamic Burn-In 240 Hours at +125oC or equivalent Method 1015 Condition A Electrical Tests Subgroups 1, 7, 9 (T2) Burn-In Delta Calculation (T0 - T2) PDA Calculation 3% Functional 5% Subgroups 1, 7, Electrical Test +125oC, -55oC Alternate Group A Inspection Method 5005 Fine and Gross Leak Tests Method 1014 Customer Source Inspection (Note 2) Group B Inspection (Notes 2, 4) Method 5005 Group D Inspection (Notes 2, 4) Method 5005 External Visual Inspection Method 2009 Data Package Generation (Note 3)
Harris -8 Product Flow
Internal Visual Inspection, Alternate Condition B (Note 1) Gamma Radiation Assurance Tests Method 1019 Customer Pre-Cap Visual Inspection (Notes 1, 2) Temperature Cycling Method 1010 Condition C (50 Cycles) Constant Acceleration Method 2001 Y1 30kG Fine and Gross Leak Tests Method 1014 Marking Initial Electrical Tests (T0) Dynamic Burn-In 160 Hours, +125oC Method 1015 or Equivalent Condition D
NOTES: 1. Visual inspection is performed to MIL-STD-883 Method 2010, Alternate Condition B. 2. These steps are optional, and should be listed on the purchase order if required. 3. Data Package Contents: Test Attributes (including Group A) -55oC, +25oC, +125oC Radiation Testing Certificate of Conformance 4. Group B, C and D data package contains Attributes Data only.
Electrical Tests Subgroups 1, 7, 9 (T1) Method 5004 PDA Calculation 5% Subgroups 1, 7 Method 5004 Electrical Test +125oC, -55oC Method 5004 Alternate Group A Inspection Method 5005 Customer Source Inspection (Note 2) Group B Inspection (Notes 2, 4) Method 5005 (Optional) Group C Inspection (Notes 2, 4) Method 5005 (Optional) Group D Inspection (Notes 2, 4) Method 5005 (Optional) External Visual Inspection Method 2009 Data Package Generation (Note 3)
Spec Number 10
518022
HS-1840RH Metallization Topology
DIE DIMENSIONS: 110 x 159 x 11mils METALLIZATION: Type: Al Thickness: 12.5kA 2kA GLASSIVATION: Type: SiO2 Thickness: 8kA 1kA DIE ATTACH: Material: Gold Eutectic Temperature: Sidebrazed CerDIP - 460oC (Max) Flatpack - 460oC (Max) WORST CASE CURRENT DENSITY: Modified SEM LEAD TEMPERATURE (10s Soldering): <275oC PROCESS: CMOS-DI
Metallization Mask Layout
HS-1840RH
IN7
IN6
IN5
IN4
IN3
IN2
IN1
IN8
ENABLE
-V A0 A1
OUT A2
A3 VREF +V
IN16
GND
IN15
IN14
IN13
IN12
IN11
IN10
IN9
Spec Number 11
518022
HS-1840RH Ceramic Dual-In-Line Frit Seal Packages (CerDIP)
c1 -A-DBASE METAL E b1 M -Bbbb S BASE PLANE SEATING PLANE S1 b2 b ccc M C A-B S AA C A-B S D Q -CA L DS M (b) SECTION A-A (c) LEAD FINISH
F28.6 MIL-STD-1835 GDIP1-T28 (D-10, CONFIGURATION A)
28 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE INCHES SYMBOL A b b1 b2 b3 c MIN 0.014 0.014 0.045 0.023 0.008 0.008 0.500 MAX 0.232 0.026 0.023 0.065 0.045 0.018 0.015 1.490 0.610 MILLIMETERS MIN 0.36 0.36 1.14 0.58 0.20 0.20 12.70 MAX 5.92 0.66 0.58 1.65 1.14 0.46 0.38 37.85 15.49 NOTES 2 3 4 2 3 5 5 6 7 2, 3 8 Rev. 0 4/94
eA
c1 D E e eA eA/2 L Q S1
e
DS
eA/2
c
0.100 BSC 0.600 BSC 0.300 BSC 0.125 0.015 0.005 90o 28 0.200 0.060 105o 0.015 0.030 0.010 0.0015
2.54 BSC 15.24 BSC 7.62 BSC 3.18 0.38 0.13 90o 28 5.08 1.52 105o 0.38 0.76 0.25 0.038
aaa M C A - B S D S
NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer's identification shall not be used as a pin one identification mark. 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. 4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b2. 5. This dimension allows for off-center lid, meniscus, and glass overrun. 6. Dimension Q shall be measured from the seating plane to the base plane. 7. Measure dimension S1 at all four corners. 8. N is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling dimension: INCH.
aaa bbb ccc M N
Spec Number 12
518022
HS-1840RH Ceramic Metal Seal Flatpack Packages (Flatpack)
A
K28.A MIL-STD-1835 CDFP3-F28 (F-11A, CONFIGURATION B)
28 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE INCHES SYMBOL MIN 0.045 0.015 0.015 0.004 0.004 0.460 0.180 0.030 MAX 0.115 0.022 0.019 0.009 0.006 0.740 0.520 0.550 MILLIMETERS MIN 1.14 0.38 0.38 0.10 0.10 11.68 4.57 0.76 1.27 BSC 0.20 6.35 0.66 0.00 28 0.38 9.40 1.14 0.04 MAX 2.92 0.56 0.48 0.23 0.15 18.80 13.21 13.97 NOTES 3 3 7 2 8 6 Rev. 0 5/18/94
e
PIN NO. 1 ID AREA
A
-A-
-B-
D
A b
S1 b E1
b1 c c1 D
0.004 M Q A -C-
H A-B S
DS E
0.036 M
H A-B S C
DS
E E1 E2
-D-H-
L E3
E2 E3 LEAD FINISH
L
E3 e k L
0.050 BSC 0.008 0.250 0.026 0.00 28 0.015 0.370 0.045 0.0015
SEATING AND BASE PLANE
c1
BASE METAL b1 M M (b) SECTION A-A
(c)
Q S1 M N
NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer's identification shall not be used as a pin one identification mark. Alternately, a tab (dimension k) may be used to identify pin one. 2. If a pin one identification mark is used in addition to a tab, the limits of dimension k do not apply. 3. This dimension allows for off-center lid, meniscus, and glass overrun. 4. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 5. N is the maximum number of terminal positions. 6. Measure dimension S1 at all four corners. 7. For bottom-brazed lead packages, no organic or polymeric materials shall be molded to the bottom of the package to cover the leads. 8. Dimension Q shall be measured at the point of exit (beyond the meniscus) of the lead from the body. Dimension Q minimum shall be reduced by 0.0015 inch (0.038mm) maximum when solder dip lead finish is applied. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling dimension: INCH.
Spec Number 13
518022

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